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Keynote
Design of an ESD Robust Wireless Sensor Chip for Medical Applications
Paul Paddan, Michael Best, Emelita Ferrer, Alan Chi Wai Wong, Derek Wood, Toumaz Technology; Helmut Buchner, and Harald Gossner, Infineon Technologies
Abstract
The SensiumTM is a complete wireless vital signs measurement mixed signal/RF system-on-chip platform. The primary objective is to provide clinicians with an affordable way to increase patient surveillance and safety by improving the accuracy and availability of patient vital signs data. Vital signs include respiration rate, heart rate, and skin temperature. In developing this personalized medical device, robust ESD performance was critical as the device can be deployed in a wide range of handling environments. This paper will present the key work on the combination of process and design choices made in the implementation of an ESD protection strategy for the entire chip and the subsequent qualification testing carried out in order to validate the robustness of the device.
Biography
Paul Paddan graduated from the University of Warwick and worked for Plessey Research on CCD and MOS chips. He then co-founded a chip design company before joining Thomson CSF and then Austria Microsystems. Later he joined Parthus Ceva working on GPS RF technology before moving onto Toumaz Technology. Paul was the design and project manager for SensiumTM.
Invited Talks
1 Future Challenges of ESD Protection –
an Automotive OEM’s point of View
Christian Lippert, Audi
Abstract
With an increasing amount of electronics, the continuous improvement of vehicle reliability requires, as an essential part, significant enhancements in ESD-robustness. ESD events not only occur during packaging and handling, but also in the complete process chain from the semiconductor manufacturing up to OEM’s final assembly. The vehicle itself has to be ESD protected for different discharge conditions that occur in real life. Currently, each level of electronic development (microelectronics and electronic circuits) is using its own strategies in ESD protection. On the system level a large range of different ESD stress conditions, protection philosophies, and technical solutions is visible. To reach the next level in reliability we need to think about how to harmonize those different discrete ESD requirements. This paper will present a state-of-the-art automotive ESD protection and qualification strategy, the future challenges, and the necessary changes in mind to tackle them.
Biography
Christian Lippert graduated in 2004 from Friedrich-Alexander-University of Erlangen-Nuremberg. He then joined the technical development division EMC of AUDI AG, responsible for EMC vehicle concepts and ESD.
2 IC Package Technology Advancements &
Challenges for this Decade
Mahadevan Iyer, Texas Instruments
Abstract
During the last decade, IC package technology has taken a more prominent role, in parallel with the silicon technology scaling, addressing higher speed circuit performance, increased power dissipation, and system miniaturization. The ever increasing demands for cost effective miniaturized products with enhanced functionalities is bringing new challenges for packaging technologies. Chip–package design and modeling, electrical, thermal and thermo mechanical design
optimizations, single chip and multi chip assembly and packaging technologies, new materials and processes, 3D integration method-ologies, and design for reliability, are the key packaging and integration challenges that are being addressed. This talk will address the packaging trends, challenges, and impact of these emerging packaging technologies on IC reliability.
Biography
Dr. Iyer manages the Worldwide Semiconductor Packaging at Texas Instruments, Inc. He received his Ph.D for his thesis work on high speed interconnection technique for gigabit logic multi chip modules. Dr. Iyer has over 25 years of experience in semiconductor industry and academic centers and has worked with single chip and multi chip packaging technology design, assembly, and reliability. He has over 180 technical publications and 20 patents to his credit. He is a Senior member of IEEE and has been Technical Chair and Program Chair for various IEEE Packaging Technology Conferences.
3 Simulation Based Analysis of ESD Protection Elements on Systemlevel
Best Paper of ESD Forum 2009
Bastian Arndt, Continental Automotive
Abstract
ESD protection development that meets enforced standards and various customer requirements, may take serious effort and may still fail to protect modules effectively. This talk presents an effective tool for optimization -- a simulation methodology of the whole electrical path involved during the ESD-event, from the source of stress to the integrated circuit at risk. It combines field simulation at the PCB-level with compact simulation of relevant interconnect traces, passive, and active elements. The method demonstrated for an automotive ECU can provide all information necessary to tailor the external protection scheme and elements in order to meet multiple functional as well as robustness requirements.
Biography
Bastian Arndt is a PhD student in EE at TU Dortmund working with Continental Automotive GmbH in the field of ESD protection for ECUs. For his work he received the Best Paper Award at the 2009 ESD Forum in Berlin.
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